Browsing All posts tagged under »fpga«

EE & CS: A JTAG/XSVF Library for Arduino

September 2, 2015

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Marcelo Jimenez wrote an Arduino library to apply XSVF patterns on a JTAG interface using the Arduino as a JTAG adapter. It is especially useful for FPGA/CPLD programming. In the example provided in the GitHub repository, the XSVF file is passed through the serial port using a client-side python script. Some time ago I started some similar […]

An example of CPU for FPGAs

August 11, 2012

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Zero Characters Left: XENTRAL: A Simple FPGA CPU. The Xentral is an open source example of a CPU that can be synthesized into an inexpensive Spartan FPGA. The HDL source code (written in VHDL) and Xilinx ISE files are here. The project is still at the beginning, the CPU is very simple (e.g. no pipeline) […]

JTAGWhisperer: Arduino as a XSVF programmer

February 5, 2012

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Dangerous Prototypes features an interesting project, that is similar to my JTAGduino idea. JTAGWhisperer is a solution to program FPGAs and CPLDs using Arduino and a small client-side Python script. It reads files in the XSVF format, which stands for Xilinx Serial Vector Format and is one of the formats used to program Xilinx chips. […]

ZPUino open source processor

March 6, 2011

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ZPUino is a project that offers a microprocessor that can be put on FPGA, and that can be programmed with a simple IDE. Everything is open source: the toolchain, the IDE and the VHDL code; and it can be downloaded freely. The hardware architecture is based on the ZPU (Zylin CPU), which is a processor […]

Bus Blaster JTAG debugger

February 27, 2011

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The Bus Blaster v1 is a prototype board (from Dangerous Prototypes) that allows to access the JTAG connection of integrated circuits through USB, using the FTDI FT2232H chip for the conversion. The prototype is on sale at around 35$ as they say on their page, but keep in mind that it is still a prototype, […]

Custom hardware modeling with QEMU (ELC 2010)

September 4, 2010

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The videos of the presentations held at the Embedded Linux Conference 2010 have been recently made public on Free Electrons. I was particularly interested in one speech: Custom Hardware Modeling for FPGAs and Embedded Linux Platforms with QEMU (PDF slides and OGV video). John Williams (PetaLogix) illustrates the work they have been doing on reducing […]

Debugging OpenRisc software inside RTL simulation

August 7, 2010

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Using Icarus Verilog and a custom built GDB to debug software running inside a simulation of a OpenRisc System On Chip, thanks to the Verilog Procedural Interface.