I was particularly interested in one speech: Custom Hardware Modeling for FPGAs and Embedded Linux Platforms with QEMU (PDF slides and OGV video). John Williams (PetaLogix) illustrates the work they have been doing on reducing the effort for porting Linux on custom architectures, using Device Trees as a description of the hardware that the kernel uses to configure itself and run correctly. They are able to prototype an hardware architecture on FPGA and run Linux on it almost automatically. The same concept is now being applied on QEMU, as Edgar Iglesias (Axis) explains in the presentation. QEMU currently emulates some architectures “statically” in the sense that, once you build it, it can emulate only a set of architectures (that you can choose with the “-M” option). They are now expanding it to parse a Device Tree in order to emulate a custom hardware architecture dynamically.
The advantages of the QEMU approach to work with embedded Linux are:
- The emulation is faster than RTL simulations.
- It’s less expensive (in terms of time and money) than prototyping on FPGAs.
- Debugging and tracing software (especially the kernel) is easy and fast.
- It can be extended with plugins or programs that communicate to the QEMU r-bus
Petalogix and Axis are currently working on the QEMU system emulator for MicroBlaze architectures, but I can imagine the same approach applied on the ARM system emulator. In fact there’s another speech about it: Flattened Device Tree ARM Support Update (PDF slides and OGV video), where Grant Likely (Secret Lab) demos an execution of QEMU ARM system emulator that generates a Device Tree and passes it to a Linux kernel that has been patched to parse it and register the devices accordingly (49:45 into the video). From what I understand these are two faces of the same coin: generating a Device Tree runtime from a QEMU internal architecture and constructing a QEMU architecture runtime from a Device Tree.
There are already standardized ways to describe hardware architectures, like IP-XACT. I think that a possible approach would be to derive a Flattened Device Tree from an IP-XACT XML, thus having an industry-ready design flow to ship embedded platform, from high level architecture definition to digital design and to board support packaging.
I’m looking forward to see these changes pushed upstream in QEMU repositories.