Icarus Verilog is a compiler and simulator for one of the most used Hardware Description Language (Verilog of course). Today the developers released version 0.9.3; here is the announce on their SourceForge page.
The Release Notes state that, other than bug fixes, the current implementation is becoming closer to the standard specifications. This new version can already be installed from source, waiting for it to be packaged by Debian and Red Hat maintainers (Fedora Electronic Lab has already promised its availability on their repositories).
I’m glad to see that the project is becoming more active: the open source hardware developers need free tools whose quality can be compared to the commercial ones. An HDL compiler and simulator like Icarus (and GHDL) is important just as GCC is vital for open source software. The project roadmap predicts a future where Icarus will be used for co-simulation of Digital and Analog components thanks to Verilog-AMS (Analog and Mixed Signal) compliance, becoming then useful also for PCB designs and RF modules.